88 lines
2.7 KiB
CMake
88 lines
2.7 KiB
CMake
set(STM32_H7_TYPES
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H723xx H725xx H730xx H730xxQ H733xx H735xx
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H743xx H753xx H750xx H742xx H745xx H755xx H747xx H757xx
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H7A3xx H7A3xxQ H7B3xx H7B3xxQ H7B0xx H7B0xxQ
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)
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set(STM32_H7_TYPE_MATCH
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"H723.." "H725.." "H730.." "H730..Q" "H733.." "H735.."
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"H743.." "H753.." "H750.." "H742.." "H745.." "H755.." "H747.." "H757.."
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"H7A3.." "H7A3..Q" "H7B3.." "H7B3..Q" "H7B0.." "H7B0..Q"
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)
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set(STM32_H7_RAM_SIZES
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128K 128K 128K 128K 128K 128K
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128K 128K 128K 128K 128K 128K 128K 128K
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128K 128K 128K 128K 128K 128K
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)
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set(STM32_H7_M4_RAM_SIZES
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0K 0K 0K 0K 0K 0K
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0K 0K 0K 0K 288K 288K 288K 288K
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0K 0K 0K 0K 0K 0K
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)
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set(STM32_H7_CCRAM_SIZES
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0K 0K 0K 0K 0K 0K
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0K 0K 0K 0K 0K 0K 0K 0K
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0K 0K 0K 0K 0K 0K
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)
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set(STM32_H7_DUAL_CORE
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H745xx H755xx H747xx H757xx
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)
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stm32_util_create_family_targets(H7 M7)
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target_compile_options(STM32::H7::M7 INTERFACE
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-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
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)
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target_link_options(STM32::H7::M7 INTERFACE
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-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
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)
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target_compile_definitions(STM32::H7::M7 INTERFACE
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-DCORE_CM7
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)
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stm32_util_create_family_targets(H7 M4)
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target_compile_options(STM32::H7::M4 INTERFACE
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-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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)
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target_link_options(STM32::H7::M4 INTERFACE
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-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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)
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target_compile_definitions(STM32::H7::M4 INTERFACE
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-DCORE_CM4
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)
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function(stm32h7_get_memory_info DEVICE TYPE CORE RAM FLASH_ORIGIN RAM_ORIGIN TWO_FLASH_BANKS)
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if(${TYPE} IN_LIST STM32_H7_DUAL_CORE)
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set(${TWO_FLASH_BANKS} TRUE PARENT_SCOPE)
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else()
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set(${TWO_FLASH_BANKS} FALSE PARENT_SCOPE)
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endif()
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if(NOT CORE)
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set(CORE "M7")
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endif()
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list(FIND STM32_H7_TYPES ${TYPE} TYPE_INDEX)
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if(CORE STREQUAL "M7")
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list(GET STM32_H7_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
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set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
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set(${FLASH_ORIGIN} 0x8000000 PARENT_SCOPE)
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set(${RAM_ORIGIN} 0x20000000 PARENT_SCOPE)
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elseif((${TYPE} IN_LIST STM32_H7_DUAL_CORE) AND (CORE STREQUAL "M4"))
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list(GET STM32_H7_M4_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
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set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
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set(${FLASH_ORIGIN} 0x8100000 PARENT_SCOPE)
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set(${RAM_ORIGIN} 0x10000000 PARENT_SCOPE)
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else()
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message(FATAL_ERROR "Unknown core ${CORE}")
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endif()
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endfunction()
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function(stm32h7_get_device_cores DEVICE TYPE CORES)
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if(${TYPE} IN_LIST STM32_H7_DUAL_CORE)
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set(${CORES} M7 M4 PARENT_SCOPE)
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else()
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set(${CORES} M7 PARENT_SCOPE)
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endif()
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endfunction()
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